Recently, in accordance with miniaturization of a semiconductor element, a method capable of forming a pattern having a dimension beyond a resolution limit in lithography method is required.
As one sample of the method, a method is known, that includes steps of forming sidewall patterns on side surfaces of core materials, eliminating the core materials, and etching a workpiece film by using the sidewall patterns as a mask, for example, disclosed in JP-A-1996-55908.
Since the sidewall patterns and wiring patterns formed by using the sidewall patterns as a mask have closed loop shapes, a step of a closed loop cut for cutting a part of the closed loop shape is needed. In case that the other patterns exist close to the sites where the closed loop cut is carried out, generally, spaces are created between the other patterns in terms of a margin of displacement at the alignment in the lithography method.